Monday, May 2, 2011

cache memory

A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. The cache is a smaller, faster memory which stores copies of the data from the most frequently used main memory locations. As long as most memory accesses are cached memory locations, the average latency of memory accesses will be closer to the cache latency than to the latency of main memory.
When the processor needs to read from or write to a location in main memory, it first checks whether a copy of that data is in the cache. If so, the processor immediately reads from or writes to the cache, which is much faster than reading from or writing to main memory.
Most modern desktop and server CPUs have at least three independent caches: an instruction cache to speed up executable instruction fetch, a data cache to speed up data fetch and store, and a translation lookaside buffer (TLB) used to speed up virtual-to-physical address translation for both executable instructions and data. Data cache is usually organized as a hierarchy of more cache levels (L1, L2, etc.; see Multi-level caches).

1 comment:

  1. Wow!! it's like the shop person will have some items in high demand (mostly accessed) on front table only so that he can immediately provide to customer. So if customer will ask one blade first he will search in show case embedded down to front table, with hope it's there and immediately can be served. If it's not found there he will go to proper (Correct memory address) showcase inside the shop and will pickup some blades and serve to customer. But same time he will bring some blades (Mostly asked/accessed item) from showcase (Memory) and put to front table ( Cache memory) to reduce the any probable delay in next demand. He will bring only few as the front table is having limited space and it will cost to increase the front table space as compared to increasing the space in showcase :-)

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